AI Markets · · 7 min read

TSMC’s $35.7B Quarter Confirms AI Demand—and Taiwan’s Chokepoint Status

Fourth consecutive record profit validates infrastructure buildout, but capacity constraints through 2028 expose semiconductor supply as the real rate-limiter on AI deployment.

TSMC’s Q1 2026 revenue hit $35.7 billion, up 35% year-over-year, marking the company’s highest-ever quarterly earnings and validating AI infrastructure as a sustained demand driver—but advanced chip capacity fully booked through 2028 reveals semiconductor manufacturing, not capital or algorithms, as the binding constraint on AI deployment scaling.

The Taiwanese chipmaker’s fourth straight record quarter coincides with Nvidia overtaking Apple as TSMC’s largest customer in 2026, projected to account for $33 billion in revenue (22% of total) versus Apple’s $27 billion (18%). High-performance computing—primarily AI accelerators—now represents 55% of TSMC’s revenue mix, per Q4 2025 disclosures, a structural shift from the smartphone-dominated revenue of prior years.

March 2026 revenue alone reached NT$415.19 billion (~$13.1 billion), up 45.2% year-over-year, according to TSMC’s latest filing. Gross margins guided at 63-65% and operating margins at 54-56% reflect pricing power in a supply-constrained regime where demand vastly exceeds available capacity.

Capacity Bottleneck Becomes Deployment Ceiling

TSMC’s 3-nanometer and 2-nanometer nodes are fully utilised, with advanced capacity booked through 2028. The 2nm node is ramping from 50,000 wafers per month to a target of 140,000 by December 2026, but even at full ramp, demand exceeds supply. Apple has reportedly secured 50% of 2nm allocation; Nvidia has locked down over 60% of total CoWoS advanced packaging capacity for 2025-2026, per CNBC reporting.

TSMC Q1 2026 Performance
Revenue$35.7B
YoY Growth+35.1%
Gross Margin (guided)63-65%
HPC Revenue Share55%

Broadcom flagged the constraint explicitly on March 24, warning that TSMC is hitting production capacity limits, describing it as a “chokepoint” for AI Infrastructure chips. The bottleneck isn’t just wafer fabrication—CoWoS advanced packaging, which integrates high-bandwidth memory directly beside compute dies, is equally constrained. “You just can’t get enough memory inside your compute chip to fully utilize it,” a TSMC spokesperson explained. “When we introduce CoWoS, we are able to bring the HBM memory right beside the compute in a very efficient way.”

But CoWoS capacity is finite. TSMC has expanded packaging capacity to meet demand, yet customers like Intel are being redirected to overflow providers ASE and Amkor, indicating primary capacity is exhausted.

$52-56 Billion Capex: Equipment Suppliers’ Windfall

TSMC’s 2026 capital expenditure guidance of $52-56 billion represents a 30% increase from 2025’s $40.9 billion, with 70-80% allocated to advanced process technologies. Full-year 2026 revenue is forecast to grow approximately 30% in USD terms.

Capex Allocation Breakdown
  • $36-45 billion toward leading-edge nodes (2nm, 3nm, A16)
  • ~30 EUV lithography machines annually from ASML to support N2/N3 capacity
  • Applied Materials projects >20% semiconductor equipment revenue growth in 2026
  • ASML 2026 revenue guidance: €34-39 billion, up 7% on TSMC demand

The capex intensity reflects not just fab expansion but the escalating cost of each technology node. A 2nm wafer costs approximately $30,000; an A16 wafer approaches $45,000, according to industry estimates. TSMC announced price increases of 3-10% on advanced nodes starting January 1, 2026, with consecutive hikes planned through 2029.

For equipment suppliers, TSMC’s spending surge is a direct revenue catalyst. Bernstein analysts estimate TSMC will need roughly 30 EUV machines annually to support its N2 and N3 capacity additions, driving ASML’s 2026 guidance. Applied Materials similarly benefits from increased deposition, etch, and metrology tool demand tied to advanced node complexity.

Geopolitical Leverage Intensifies

TSMC controls approximately 70% of global advanced foundry market revenue and 90% of the most advanced AI accelerator manufacturing. This concentration makes Taiwan a singular point of vulnerability in the US-China technology competition. The semiconductor industry’s architecture, built on globalised efficiency over the past three decades, is being supplanted by a logic of geopolitical security, per analysis by Prof. Hung-Yi Chen.

“Morris will be happy to know Nvidia is TSMC’s largest customer now.”

— Jensen Huang, CEO, Nvidia

US export controls and industrial policy mechanisms like the CHIPS Act aim to reduce dependence on Taiwan-based production, but TSMC’s Arizona fab expansions lag the pace of advanced node development in Taiwan. Foreign Policy notes that the myth of AI sovereignty persists while actual manufacturing capacity remains concentrated in a geopolitically contested region.

The strategic implication: control over TSMC’s output is leverage. Beijing’s ability to disrupt Taiwan Strait stability directly threatens the Supply Chain underpinning Western AI deployment. Washington’s policy response—export restrictions on advanced chipmaking equipment to China, subsidies for domestic fabs—has so far failed to materially diversify supply.

Margin Expansion Reflects Structural Pricing Power

TSMC’s gross margin guidance of 63-65% for Q1 2026 compares favorably to the sub-60% margins typical of prior cycles. The expansion reflects not just volume growth but pricing power in a seller’s market. With capacity fully allocated and customers locked into multi-year agreements, TSMC can extract premium pricing for leading-edge nodes.

Customer Concentration Shift

Nvidia’s revenue contribution to TSMC rose from 12% in 2024 to 19% in 2025 and is projected at 22% in 2026. Apple’s share fell from 22% in 2024 to 17% in 2025 and an estimated 18% in 2026. The smartphone era’s dominance is yielding to data center infrastructure as the primary revenue driver.

CEO C.C. Wei has cautioned against overextension: “If we did not do it carefully, that will be a big disaster to TSMC for sure,” he noted in recent remarks, per AI CERTs News. The comment reflects the risk of mistiming capacity additions—building too fast risks margin compression if demand cools; building too slow cedes market share to Samsung, which is aggressively courting AI customers despite lagging TSMC’s yield performance.

What to Watch

TSMC’s earnings call on April 16, 2026, will clarify Q1 margin realisation and Q2 guidance, along with any capex revisions to the $52-56 billion range. Equipment supplier earnings in April—particularly ASML and Applied Materials—will validate demand visibility through 2027.

Geopolitical developments matter as much as financial metrics. Any escalation in Taiwan Strait tensions would trigger immediate reassessment of supply chain risk premiums across the semiconductor equity complex. US-China export control policy shifts, particularly around advanced packaging and EUV tooling access, could alter competitive dynamics between TSMC and Samsung.

The 2nm ramp trajectory is critical. If TSMC hits its 140,000 wafer-per-month target by year-end, it eases the bottleneck modestly—but given current customer commitments, even that capacity appears pre-sold. The question isn’t whether AI demand is real; it’s whether semiconductor supply can keep pace with deployment ambitions. Right now, the answer is no.